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2025

Cache-Aware Lock-Free Ring Buffer

Wait-free SPSC queue in C++17 for real-time sensor pipelines.

C++17std::atomicThreadSanitizerperf

Highlights

  • 013.1× throughput vs. mutex-guarded equivalent
  • 02Sub-350 ns p99 write latency
  • 03Zero races across 50M+ operations under TSan

Engineered wait-free synchronisation using std::atomic with explicit acquire/release semantics, eliminating all mutex contention and priority inversion risks.

Applied 64-byte cache-line padding to head/tail indices to prevent false sharing, validated via perf stat L1-cache-miss reduction on x86-64.

Modelled producer/consumer state transitions with UML sequence and class diagrams before implementation, enforcing invariant correctness at the design stage.

Next project

Cochlear Implant Insertion Robotics